Phase conflict resolution for photolithographic masks

ABSTRACT

A photolithographic mask used for defining a layer in an integrated circuit, or other work piece, where the layer comprises a pattern including a plurality of features to be implemented with phase shifting in phase shift regions is laid out including for patterns comprising high density, small dimension features, and for “full shift” patterns. The method includes identifying cutting areas for phase shift regions based on characteristics of the pattern. Next, the process cuts the phase shift regions in selected ones of the cutting areas to define phase shift windows, and assigns phase values to the phase shift windows. The phase shift values assigned comprise φ and θ, so that destructive interference is caused in transitions between adjacent phase shift windows having respective phase shift values of φ and θ. In the preferred embodiment, φ is equal to approximately θ+180 degrees. Results of the cutting and assigning steps are stored in a computer readable medium, used for manufacturing a mask, and used for manufacturing an integrated circuit. By identifying the cutting areas based on characteristics of the pattern to be formed, the problem of dividing phase shift regions into phase shift windows, and assigning phase shift values to the windows is simplified.

RELATED APPLICATIONS

[0001] This application is a continuation of U.S. patent application Ser. No. 09/932,239 filed 17 Aug. 2001 entitled “Phase Conflict Resolution for Photolithographic Masks,” having inventors Christophe Pierrat and Michael Côté, which application is related to, claims the benefit of priority of, and incorporates by reference, the U.S. Provisional Patent Application Serial No. 60/296,788 filed 08 Jun. 2001 entitled “Phase Conflict Resolution for Photolithographic Masks” having inventors Christophe Pierrat and Michael Côté and assigned to the assignee of the present invention, and which is related to, claims the benefit of priority of, and incorporates by reference, the U.S. Provisional Patent Application Serial No. 60/304,142 filed 10 Jul. 2001 entitled “Phase Conflict Resolution for Photolithographic Masks” having inventors Christophe Pierrat and Michael Côté and assigned to the assignee of the present invention.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The present invention relates to manufacturing small dimension features of objects, such as integrated circuits, using photolithographic masks. More particularly, the present invention relates to the application of phase shift masking to complex layouts for integrated circuits and similar objects.

[0004] 2. Description of Related Art

[0005] Phase shift masking has been applied to create small dimension features in integrated circuits. Typically the features have been limited to selected elements of the design, which have a small, critical dimension. See, for example, U.S. Pat. No. 5,766,806.

[0006] Although manufacturing of small dimension features in integrated circuits has resulted in improved speed and performance, it is desirable to apply phase shift masking more extensively in the manufacturing of such devices. However, the extension of phase shift masking to more complex designs results in a large increase in the complexity of the mask layout problem. For example, when laying out phase shift windows on dense designs, phase conflicts will occur. One type of phase conflict is a location in the layout at which two phase shift windows having the same phase are laid out in proximity to a feature to be exposed by the masks, such as by overlapping of the phase shift windows intended for implementation of adjacent lines in the exposure pattern. If the phase shift windows have the same phase, then they do not result in the optical interference necessary to create the desired feature. Thus, it is necessary to prevent inadvertent layout of phase shift windows in phase conflict near features to be formed in the layer defined by the mask.

[0007] In the design of a single integrated circuit, millions of features may be laid out. The burden on data processing resources for iterative operations over such large numbers of features can be huge, and in some cases makes the iterative operation impractical. The layout of phase shift windows and the assignment phase shift values to such windows, for circuits in which a significant amount of the layout is accomplished by phase shifting, is one such iterative operation which has been impractical using prior art techniques.

[0008] Because of these and other complexities, implementation of a phase shift masking technology for complex designs will require improvements in the approach to the design of phase shift masks.

SUMMARY OF THE INVENTION

[0009] The present invention provides techniques for extending the use of phase shift techniques to implementation of masks for a pattern having high density, small dimension features, and the use of such masks for implementing the pattern in a layer of an integrated circuit, or other work piece. For example, the techniques of the present invention are applied in areas including multiple features using phase shift windows, where those features are in close proximity. The techniques are also applied for so-called “full shift” of dense patterns on layers of a work piece.

[0010] One embodiment of the invention is a method for producing a computer readable definition of a photolithographic mask used for defining a layer in an integrated circuit, or other work piece, where the layer comprises a pattern including a plurality of features to be implemented with phase shifting. The method includes identifying cutting areas for phase shift regions based on characteristics of the pattern. Next, the process cuts the phase shift regions in selected ones of the cutting areas to define phase shift windows, and assigns phase values to the phase shift windows. The cutting of the regions into windows and assigning of phase shift values to the windows is basically an iterative process, in which the order of cutting and assigning depends on the particular procedure, and may occur in any order. The phase shift values assigned comprise φ and θ, so that destructive interference is caused in transitions between adjacent phase shift windows having respective phase shift values of φ and θ. In the preferred embodiment, φ is equal to approximately θ+180 degrees. Results of the cutting of phase shift regions into phase shift windows, and assigning phase values to the phase shift windows are stored in a computer readable medium.

[0011] By identifying the cutting areas based on characteristics of the pattern to be formed, the problem of dividing phase shift regions into phase shift windows, and assigning phase shift values to the windows is dramatically simplified.

[0012] Representative criteria applied in the cutting of phase shift regions into phase shift windows, and assigning phase values to the phase shift windows, include the following:

[0013] 1. Try to avoid the creation of small phase shift windows that are difficult to manufacture on the mask and that do not provide sufficient process latitude.

[0014] 2. Try to keep the number of cuts to a minimum and keep the cuts with the maximum process latitude. For example, cuts originating from an outside opaque (typically chrome) corner tend to have a better process latitude than cuts originating from an inside opaque corner. Long cuts from an original opaque feature to an original opaque feature tend have more process latitude than short cuts. Cuts from an original opaque feature to a field area tend to have more process latitude than cuts from an original opaque feature to an original opaque feature.

[0015] In one embodiment of the invention, a cost function is applied, in performing the cutting and assigning steps, which relies on the identified cutting areas and on the positions and shapes of features in the pattern to be formed using the phase shift windows.

[0016] The step of identifying cutting areas includes in one embodiment of the invention, a process comprising three steps. The first step involves identifying features in the plurality of features that are characterized by non-critical process latitude to define a set of non-critical features. The second step involves identifying fields between features in the plurality of features characterized by critical process latitude to define a set of critical fields. The third step involves defining cutting areas as areas within the phase shift regions which extend between two features in the set of non-critical features, or between a feature in the set of non-critical features and a field outside the phase shift regions, without intersecting a field in the set of critical fields. The identified cutting areas are further refined in other embodiments, by changing the shape of the cutting areas or by elimination of cutting areas, based upon characteristics of the pattern, characteristics of phase shift windows which may result from cutting in the cutting area, and/or other criteria that identify areas in which cutting is less desirable.

[0017] Examples of non-critical features include elbow shaped features, T-shaped features, and polygons larger than a particular size. Parameters utilized to identify non-critical features can be determined using simulations based upon simulation criteria which tends to flag features characterized by non-critical process latitude. For example, simulations of over exposure conditions tend to identify non-critical features.

[0018] Examples of critical fields include fields between narrow lines that are close together. Parameters utilized to identify critical fields can be determined using simulations based upon simulation criteria which tend to flag fields characterized by critical process latitude. For example, simulations of under-exposure conditions tend to identify critical fields between features which bridge together across the critical field in under-exposure conditions.

[0019] In one embodiment, the phase shift windows are laid out in an opaque background. In another embodiment, the phase shift windows are laid out in a clear background.

[0020] In another embodiment of the invention, an article of manufacture comprising a machine readable data storage medium having stored thereon instructions executable by a data processing system defining steps for laying out a photolithographic mask according to the process is described above. In another embodiment of the invention, a data processing system including a processor and memory storing such instructions is provided.

[0021] In another embodiment, the present invention provides a photolithographic mask including a plurality of phase shift regions divided into phase shift windows in cutting areas that are defined as described above. Thus, a photolithographic mask for defining a pattern in a layer to be formed using the mask, wherein said pattern includes a plurality of features, and said layer includes fields outside said pattern, is provided that comprises a substrate, a mask layer of material on said substrate. The mask layer includes phase shift regions and fields, and a plurality of phase shift windows in the phase shift regions, the plurality of phase shift windows characterized by phase shift values that create phase transitions between the phase shift windows to form said pattern, wherein the boundaries of the phase shift windows lie within cutting areas that are defined based upon characteristics of said pattern. A set of features in the plurality of features, where features in the set are characterized by non-critical process latitude, and a set of critical fields between features in the plurality of features where fields in the set are characterized by critical process latitude. The cutting areas include areas within the phase shift regions which extend between two features in the set of features, or between a feature in the set of features and a field outside the phase shift regions, without intersecting a field in the set of critical fields.

[0022] In further embodiments, the present invention provides a method for manufacturing photolithographic masks according to the process described above, and a method for manufacturing a layer in an integrated circuit utilizing the photolithographic mask as described above. In addition, a new class of integrated circuits is provided that is manufactured according to the methods described herein, and have a patterned layer of material with a plurality of small dimension features which are closely spaced and implemented using alternate phase shift masking. The new class of integrated circuits comprise layers have a dense pattern of small features, that was not achievable applying the prior art techniques.

[0023] Accordingly, the present invention provides for the design and layout of photolithographic masks, and the manufacture of integrated circuits, in which the use of phase shifting is extended to so-called “full shift” patterns, in which a pattern in the integrated circuit layer is defined utilizing alternate phase shifting techniques. According to the processes provided, a new class of integrated circuits becomes practical with layers having patterns comprising high-density layout of small dimension features to a degree not possible in prior art.

[0024] Other embodiments, aspects and advantages of the presentation, can be seen upon review of the figures, the detailed description and the claims which follow.

BRIEF DESCRIPTION OF THE FIGURES

[0025] The file of this patent contains at least one drawing executed in color. Copies of this patent with color drawing(s) will be provided by the Patent and Trademark Office upon request and payment of the necessary fee.

[0026]FIG. 1 illustrates a complex pattern of features, and phase shift regions for defining the features using a “full shift” technique according to the present invention, prior to cutting the phase shift regions into phase shift windows and assigning phase shift values to the phase shift windows.

[0027]FIG. 2 illustrates the pattern of FIG. 1, after cutting the phase shift regions into phase shift windows and assigning phase shift values to the phase shift windows.

[0028]FIG. 3 is a simplified flow chart illustrating a process for defining a phase shift mask, manufacturing the mask and manufacturing integrated circuits according to present invention.

[0029]FIG. 4 is a simplified flow chart illustrating an alterative process for defining a phase shift mask, manufacturing the mask and manufacturing integrated circuits according to present invention.

[0030]FIG. 5 is a color printout of a simulation done under over-exposure conditions which tend to identify non-critical features in the pattern.

[0031]FIG. 6 shows the pattern of FIG. 5 in which non-critical features in the pattern are marked.

[0032]FIG. 7 is a color printout of a simulation done with under-exposure conditions which tend to identify critical field areas between features in the pattern of FIG. 5.

[0033]FIG. 8 shows the pattern of FIG. 5 in which critical field areas are marked.

[0034]FIG. 9 illustrates the layout of phase shift regions for the pattern of FIG. 5.

[0035]FIG. 10 illustrates the pattern of FIG. 9 with non-critical features and critical field areas identified.

[0036]FIG. 11 illustrates cutting areas identified for critical features in the pattern of FIG. 9.

[0037]FIG. 12 illustrates cutting areas as modified for non-critical features in the pattern of FIG. 9.

[0038]FIG. 13 illustrates cutting areas as modified to account for T-shaped features in the pattern of FIG. 9.

[0039]FIG. 14 illustrates cutting areas as modified for outside corners and small spaces in the pattern of FIG. 9.

[0040]FIG. 15 illustrates the cutting areas as modified for small shifters in the pattern of FIG. 9.

[0041]FIG. 16 illustrates a representative layout of phase shift windows for the pattern of FIG. 9.

[0042]FIG. 17 illustrates a representative layout of a trim mask for use with the phase shift mask of FIG. 16.

[0043]FIG. 18 illustrates a simulation of an exposure pattern using a masks as shown in FIG. 16 and FIG. 17, without optical proximity correction.

[0044]FIG. 19 illustrates a representative layout of phase shift windows of FIG. 16, with optical proximity correction.

[0045]FIG. 20 illustrates a simulation of an exposure pattern using a mask as shown in FIG. 19.

[0046]FIG. 21 is a simplified flow chart of a process for identifying cutting areas, cutting the shift regions into phase shift windows in the cutting areas, and assigning phase shift values to the phase shift windows.

[0047]FIG. 22 is a simplified diagram of data processing system according to one example of the present invention.

DETAILED DESCRIPTION

[0048] A detailed description of embodiments of the present invention is provided with respect to the figures. The basic invention can be understood with reference to FIGS. 1 and 2. In FIG. 1, a pattern that includes a plurality of features in the three opaque regions 1, 2 and 3 is shown. For a “full shift” implementation of a mask for creating the pattern, phase shift regions 5 are laid out by forming boundaries of the phase shift regions parallel with the sides of the dark regions 1, 2, 3 with the exception of the ends of narrow lines, such as the line end 4. The problem solved by the present invention is to create phase shift windows in the phase shift regions for an alternating phase shift mask to implement the three dark regions 1, 2, 3. Thus, one must decide where to cut the phase shift regions 5 to form the phase shift windows, without creating phase conflicts, with as few cuts as practical.

[0049] According to the present invention, non-critical features in the pattern are identified first. Such features in this example include T-shaped features such as the feature A, elbow shaped features such as the feature B, and large polygons such as the features C, D, and E. Also, field areas outside the phase shift regions are identified. Potential cutting areas are determined based on these characteristics of the pattern, so that the phase shift region should be cut along lines between non-critical features, or along lines between a non-critical feature, and a field area that is outside the phase shift region. Furthermore, the phase shift regions should not be cut along lines which intersect narrow fields, having lesser process latitude, as explained in more detail below.

[0050]FIG. 2 shows one example layout of the phase shift windows for the pattern of FIG. 1, where the phase shift region is cut along a line 16 from the non-critical feature A to the field, along a line 6 from the non-critical feature C to the field, along a line 7 from the non-critical feature D to the field, along a line 8 from the non-critical feature E to the field, and along a line 9 from the non-critical feature E to the field. As a result, phase shift windows 10, 11, 12 are created and assigned a phase value of θ, and phase shift windows 13, 14 and 15 are created and assigned a phase shift value of φ, where φ is equal to approximately θ+180 degrees, so that desired destructive interference occurs for definition of the desired pattern. In the context of an alternating phase shift mask, it is preferred that φ be close to 180 degrees plus θ, such as within plus or minus 10 degrees. Other phase shifting techniques may apply other combinations of phase values, or require stepped phase values so that more than two phase values are used.

[0051] The problem of selecting the locations of the cuts to create the phase shift windows is extremely complex, because the large numbers options for locating the cuts. The identification of a bound number of cutting areas based on features of the pattern, as taught by the present invention significantly simplifies this problem.

[0052]FIGS. 3 and 4 illustrate alternative approaches to the phase shift window cutting and phase value assignment solution of the present invention. As shown in FIG. 3, the process begins by reading a layout file defining a complex layer of an integrated circuit, or other work piece (block 20). A software algorithm is applied to identify “non-critical” opaque features, which are characterized by greater process latitude (block 21). Also in the step represented by block 21, “critical” fields are identified which are characterized by lesser process latitude. Next, phase shift regions are laid out around the pattern, which are to be cut into phase shift windows (block 22). Cutting areas are identified based upon the features of the pattern, and the phase shift regions are cut on lines between “non-critical” features, or between a non-critical feature and a field, including fields near line ends, without intersecting so-called “critical” field regions (blocks 23 and 24). After the phase shift windows are defined, optical proximity correction techniques are applied to complete a phase shift mask layout (block 25). A complementary trim mask is defined as known in the art, which for an opaque background phase shift mask, trims line ends and unwanted artifacts created by the transitions between phase shift windows that are not part of the pattern to be formed on the layer, and optionally defines other features in the layer (block 26). The phase shift masks are printed (block 27), and integrated circuits are manufactured using the masks to complete the manufacturing process (block 28).

[0053]FIG. 4 illustrates an alternate flow for the process. The flow of FIG. 4 likewise begins by reading a layout file defining a complex layer of an integrated circuit, or other work piece (block 30). A software algorithm is applied to identify “non-critical” features, which are characterized by greater process latitude (block 31). Also in the step represented by block 31, “critical” fields identified which are characterized by lesser process latitude. Next, preliminary phase shift windows are laid out adjacent features that have lesser process latitude than the “non-critical” features, with cuts in cutting areas (block 32). Next, phase shift values are assigned, and the preliminary phase shift windows are merged to form final phase shift windows, by eliminating some cuts (block 33). Thus, rather than beginning with a unified phase shift region as shown in FIG. 1, a plurality of small preliminary phase shift windows is used for the starting position for this process flow. Using either flow, cutting areas are defined and final cuts are selected in cooperation with the process of assigning phase shift values to the resulting phase shift windows. After the phase shift windows are defined, optical proximity correction techniques are applied to complete a phase shift mask layout (block 34). A complementary trim mask is defined as known in the art (block 35). The phase shift masks are printed (block 36), and integrated circuits are manufactured using the masks to complete the manufacturing process (block 37).

[0054] The “non-critical” features of the pattern can be understood with reference to FIG. 5, which is a printout of a simulation formed using over exposure conditions. The features of the pattern which remain unexposed according to the simulation are identified by contour lines (e.g. line 40) around darker regions in the printout. These unexposed features correlate with the “non-critical” opaque features which are used for the purposes of the present invention to identify cutting areas for the phase shift windows in the layout problem. For example, non-critical areas can be areas that are left over after an over exposure of about 20 percent from a nominal dose and de-focus at the edge of the focus latitude window for example of about 0.3 micron. The simulation process can also be used to determine parameters that can be used with a design rule checker of layout tool to identify the “non-critical” features using a software algorithm analyzing the machine readable layout. The parameters used by such tools can also be determined by trial and error, or by simply applying knowledge of persons skilled in the art.

[0055] It can be seen that non-critical features comprise large polygons, any elbow or “T,” and fields that are opaque in an opaque background phase shift layout, since such opaque fields will be removed during the exposure with the trim mask. Preferential cuts are made between the non-critical areas and fields near line ends, since line ends are already cut using the second level exposure, and according to other “cost function” criteria as described below.

[0056]FIG. 6 shows the layout of the pattern simulated in FIG. 5, with the non-critical features identified by diagonal hatching. The contour line 40 of FIG. 5, corresponds to the feature 41 of FIG. 6.

[0057] The definition of a critical field area can be understood with reference to FIG. 7, which shows a printout of a simulation of extreme under exposure conditions. Certain tight space areas (e.g. area 43) tend to bridge due to the under exposure between features in the pattern. Such tight space areas can be seen where the patterns are bridging in FIG. 7. For example, critical field areas can be areas bridging after an under exposure by 20 percent from a nominal dose, and the focus at the edge of the focus latitude of for example 0.3 micron. The critical field areas can also be flagged using a set of rules used in a design rule checker or layout tool for example, with the parameters determined by the simulation process, by trial and error, or by applying knowledge of persons skilled in the art. The phase shift regions should not be cut to form phase shift windows through critical field areas.

[0058]FIG. 8 illustrates the pattern simulated in FIG. 7, with the critical space areas identified in by cross-hatching. The area 43 of FIG. 7 corresponds to the area 44 in FIG. 8.

[0059] The process of identifying cutting areas for the pattern shown FIGS. 5-8 can be understood with reference to FIGS. 9-15. In FIG. 9, phase shift regions 45 are defined surrounding the pattern shown in black, by extending lines parallel to the sides of the opaque features in the pattern and spaced away by a selected amount. Characteristics of the pattern that are to be applied in the defining of cutting areas can be seen in FIG. 10, in which the phase shift regions, the critical field areas shown in diagonal hatching, and the non-critical features of the pattern shown in cross-hatching are combined.

[0060]FIG. 11 shows a first step in the process of identifying cutting areas according to one process flow. In this step, portions of phase shift regions (e.g. portion 46) shown in square dot hatching which are to be protected from cutting in order to define the critical dimension features of the pattern are shown.

[0061] In FIG. 12, portions of the phase shift regions to be protected are extended by allowing phase shift windows adjacent to the non-critical features as well as the critical features. Thus, it can be seen that adjacent the large rectangle 50, a phase shift region 51 is protected from cutting. Other similar portions of the phase shift regions are protected from cutting as can be seen by a comparison of FIGS. 11 and 12.

[0062] In FIG. 13, the shapes of the cutting areas shown in square dot hatching are adjusted to account for T-shaped features. Thus, near the T-shaped feature 52, the shape of the cutting area 53 has been adjusted. Similar adjustments to the shapes of cutting areas have been made near other T-shaped features.

[0063] In FIG. 14, further adjustments to the shapes of the cutting areas are made to clean up outside corner features, such as the outside corner features 54, where the cutting region is reduced in area as shown at region 55, in order to fill in the potential sides of the patient window. Also, small spaces in the field of the phase shifter layer are cleaned out. Thus, the small opaque field area 56 of FIG. 13 is eliminated in the layout of FIG. 14, by extension of the phase shift region to cover it.

[0064] In FIG. 15, the final layout of the cutting areas is shown, including isolated small shifter extensions. Thus, the small area 57 of FIG. 14 which is protected from cutting, is increased in size to establish region 58 as shown in FIG. 15. Similar adjustments are made to other small shifter regions. Adjustments are made only if the phase shift window is sufficiently isolated from other phase shift windows, so that merger of windows is avoided while the number of possible cuts is reduced.

[0065] Given a bounded number of identified cutting areas shown in yellow within the adjusted phase shift region in the layout of FIG. 15, a process of selecting cuts and assigning phase values to form phase shift windows is initiated according to present invention. One example layout is shown in FIG. 16, where zero degree phase shift regions (e.g. region 45) are identified by irregular square dot hatching, 180 degree phase shift regions (e.g. region 46) are identified by diagonal cross-hatching, and the pattern is identified by generally black filler. Opaque background areas are left white in this diagram.

[0066]FIG. 17 is a diagram of a binary trim mask for use with the phase shift mask of FIG. 16. The trim mask can be produced by initially OR'ing the phase layers and the poly layer with one another. Then, sizing down by minus 0.02 μm (for 248 nm process) and then OR'ing that sized down layer with the original field poly. The resulting trim mask is smaller than phase regions, but sufficiently sized to protect against misalignment. Other embodiments of trim masks are made using attenuated binary masking, or other types of masks.

[0067]FIG. 18 is a print out of a simulation of the exposure created using the mask layouts shown in FIGS. 16 and 17. As can be seen, the desired pattern is substantially formed.

[0068]FIG. 19 shows a modification of the phase shift windows of FIG. 16 after application of optical proximity correction techniques known in the art. Thus, the modified zero degree phase shift windows are identified with irregular square dot hatching, and the modified 180 degree phase shift windows are identified with diagonal cross-hatching. The simulation of the pattern exposed using the mask of FIG. 19 is shown in FIG. 20. FIG. 20 also shows a trace of the original pattern defined in the layout file. As can be seen, the exposure matches the original layout quite well.

[0069] The resulting layer in an integrated circuit according to the present invention is characterized by a dense pattern of small features formed using alternate phase shift masking. For a given wavelength of exposing radiation, the density is improved significantly by applying these techniques.

[0070] Representative prototypes of computer programs implemented using a design rule checker DRC, such as Cadence DRC tools (Assura or Vampire) available from Cadence Design Systems, San Jose, Calif., or a layout tool such as the Cadabra tool (abraCAD) available from Cadabra, a Numerical Technologies, Inc. company, San Jose, Calif., which perform the process of defining the shapes and positions of phase shift window according to the present invention operate as explained below.

[0071] The basic process flow for either prototype includes the following:

[0072] 1. Create the phase layer with no cut. The shifter layer that defines phase shift regions is created by sizing the original layout by a given width (shifter width). Only the line-ends are not sized.

[0073] 2. Identify the non-critical regions of the layout. For both tools, a similar methodology is used. For example using Assura, we define:

[0074] L1=original poly layer definition, including the pattern to be processed.

[0075] L2=non-critical regions of the original poly layer.

[0076] L2_(—)1=geomSize(L1−0.06 edges) ;; create a layer L2_(—)1 from the original edge location to ;; an edge location moved by 0.06 micron inside the polygons, ;; so that widths smaller than 0.12 micron disappear.

[0077] L2_(—)2=geomAndNot(L1 L2_(—)1) ;; subtract L2_(—)1 from L1.

[0078] L2=geomSize(L2_(—)2 0.06) ;; size L2_(—)2 by 0.06 micron, this layer contains all the large ;; features from L1 as well as the “Ts” and elbows.

[0079] 3. Identify critical space regions.

[0080] L1=original poly layer definition.

[0081] L3=critical space region of the original poly layer.

[0082] L3_(—)1=geomSize(L1 0.1 edges) ;; creates a layer L3_(—)1 from the original edge location to ;; an edge location moved by 0.1 micron outside the ;; polygons (all spaces below 0.2 micron will be merged).

[0083] L3_(—)2=geomSize(L3_(—)1−0.05) ;;sizes down L3_(—)1 by 0.05 micron, only bridged areas remain.

[0084] L3=geomSize(L3_(—)2 0.05) ;;brings bridged areas back to normal size.

[0085] 4. Create phase-shifting regions protected from cutting, as shown in FIGS. 11-15.

[0086] 5. Create possible cut regions: the difference between the phase-layer with no cut (step1—See FIG. 9) and the phase-shifting regions (step 4—See FIG. 15) represents the areas where the cuts are allowed.

[0087] 6. Assign phase values (for example 0 or 180 degrees) and decide which cut should be used: the decision on phase value assignment and on choice of cut is made using the following criteria:

[0088] a) try to avoid the creation of small phase-shift windows that are difficult to manufacture on the mask and that do not provide sufficient process latitude.

[0089] b) try to keep the number of cuts to a minimum and keep the cuts with the maximum process latitude. For example, cuts originating from an outside opaque (chrome) corner tend to have a better process latitude than cuts originating from an inside opaque corner. Long cuts from an original opaque feature to an original opaque feature tend have more process latitude than short cuts. Cuts from an original opaque feature to a field area tend to have more process latitude than cuts from an original opaque feature to an original opaque feature.

[0090] c) The selection rules are used to create a cost function, according to known techniques that is minimized during the process of assigning phases and choosing cuts.

[0091]FIG. 21 is a simplified flow diagram for the process of laying out phase shift windows according to one embodiment of the present invention. The process begins with reading out a layout file defining a complex layer including a pattern to be implemented (block 110). Features of the pattern having a width smaller than a parameter W are removed (block 111). T-shaped and elbow-shaped features are added back (Block 112). The resulting image is saved as an image of “non-critical” features (block 113). Next, features are identified that are separated by a field less than a parameter X across (block 114). “Critical” bridge areas are defined as the fields between such features (block 115). Phase shift regions are created around the pattern, from which phase shift windows will be created (block 116). Possible cut regions are identified based upon the features of the pattern outlined above, and ranked by cost function (block 170). Phase values are assigned to regions and decisions are made as to which cuts to use while minimizing the cost function, to create the final layout of phase shift windows (block 118). The layout is saved in a computer readable medium (block 119).

[0092] The generation of phase shift masks for a complex structure is a non-trivial processing problem. FIG. 22 illustrates a data processing system for such task, representative of a wide variety of computer systems and computer architectures suitable for this application. Machine 250 in FIG. 22 includes processor 252 connected for receiving data indicating user signals from user input circuitry 254 and for providing data defining images to display 256. Processor 252 is also connected for accessing mask and layer layout data 258, which define a mask layout under construction and a layout for a layer of material to be exposed using the mask. Processor 252 is also connected for receiving instruction data 260 indicating instructions through instruction input circuitry 262, which can illustratively provide instructions received from connections to memory 264, storage medium access device 266, or network 268.

[0093] In executing the commands indicated by instruction data 260, processor 252 uses layout data 258 to provide data defining a layout for a mask, and optionally an image of the mask layout to display 256 to cause it to present a representation of the layout.

[0094] In executing the instructions indicated by instruction data 260, processor 252 also receives user signal data from user input device 254, as necessary for control of, or interaction with, the process.

[0095] As noted above, FIG. 22 illustrates three possible sources from which instruction input circuitry 262 could receive data indicating instructions: memory 264, storage medium access device 266, and network 268.

[0096] Memory 264 could be any conventional memory within machine 250, including random access memory (RAM) or read-only memory (ROM), or could be a peripheral or remote memory device of any kind.

[0097] Storage medium access device 266 could be a drive or other appropriate device or circuitry for accessing storage medium 270, which could, for example, be a magnetic medium such as a set of one or more tapes, diskettes, or floppy disks; an optical medium such as a set of one or more CD-ROMs; or any other appropriate medium for storing data. Storage medium 270 could be a part of machine 250, a part of a server or other peripheral or remote memory device, or a software product. In each of these cases, storage medium 270 is an article of manufacture that can be used in machine 250. Data units can be positioned on storage medium 270 so that storage medium access device 266 can access the data units and provide them in a sequence to processor 252 through instruction input circuitry 262. When provided in the sequence, the data units form instruction data 260, indicating instructions as illustrated.

[0098] Network 268 can provide instruction data 260 received as a communication from machine 280. Processor 282 in machine 280 can establish a connection with processor 252 over network 268 through network connection circuitry 284 and instruction input circuitry 262. Either processor could initiate the connection, and the connection could be established by any appropriate protocol. Then processor 282 can access instruction data stored in memory 286 and transfer the instruction data over network 268 to processor 252 so that processor 252 can receive instruction data 260 from network 268. Instruction data 260 can then be stored in memory 264 or elsewhere by processor 252, and can be executed.

[0099] The resulting layout data is stored in a machine readable form, or presented in a communication to a remote system.

[0100] Automatic assignment of phase shift regions, and addition of optical proximity correction features, as described above are provided in this example to facilitate processing. Three stages in the generation of phase shift mask layouts according to the process which is implemented using a design rule checking programming language (e.g. Assura (TM) Design Rule Checker provided by Cadence Design Systems) in a data processing system, like that of FIG. 22, for one example, include definition of input layers, generation of output layers, and cutting and assignment of phase values to the phase shift windows.

[0101] In some embodiments, the display 256 supports depiction (and in some embodiments interaction with) one or more of the representations of the data shown generally in figures. For example, the representation of FIG. 6 where non-critical features of the pattern are marked in a distinguishing color could be presented for review and/or human modification. Similarly, the results of simulated exposures with and/or without OPC could be reviewed and possibly compared with a non-phase shifting exposure.

[0102] In some embodiments, the assignment of phase values to regions is simplified (see blocks 117-118 of FIG. 21). Specifically, for many real world designs, the assignment can be done without the ranking (see block 117 of FIG. 21) and without the minimization of a cost function (block 118). One heuristic is to assume that a cut will be made in all possible cut regions and to assign phase values accordingly.

[0103] More generally, minimization of the cost function may be computationally intractable, or simply computationally undesirable, for one or more designs. Specific implementations may chose from a number of data representations and approaches (e.g. start with no cuts vs. start with all cuts). One embodiment uses a graph representation where each phase shifter region is represented as a node and one set of edges is used to represent adjacency and another set of edges is used to represent phase restrictions, e.g. an edge indicates that the two shifter regions must be of different phase, e.g. across a feature. Feasibility can be checked in such a graph by identifying odd length cycles of phase restrictions. To find a better solution than the heuristic above, adjacent nodes can be merged (e.g. a cut removed) provided that a phase conflict is not created. If the adjacency edges (representing cutting regions) are weighted to indicate the relative cost of the cut then one approach is to attempt to merge adjacent nodes connected by the smallest (or greatest) edge weights. However, as FIG. 16 shows, some solutions may include extending or merging phase shift regions into the (opaque) field to form larger shifter regions.

[0104] The particular data representation and approach to solving the produced coloring problem may be varied to meet the computational needs and/or combined with multiple approaches. For example, the graph approach described above could be applied for a predetermined number of iterations and then, optionally, be followed by further human optimization.

[0105] Embodiments of the invention generally require two masks, the phase shifting mask and the trim mask. Because the cost of manufacturing two masks will exceed the cost of manufacturing a single mask, designers of ICs may want to carefully select which layers will be produced according to embodiments of the invention. For example, the designer might use embodiments of the invention to produce some layers while producing other layers with single-mask techniques. In one embodiment, only those layers of the IC that include patterns with a large number of densely packed, small dimension features relative to the density and size of features on other layers of a particular design are produced using the PSM approaches described herein. In other embodiments, factors considered in making the selection take into account IC yield and performance if a given layer is produced using the PSM approaches described herein.

[0106] While the present invention is disclosed by reference to the embodiments and examples detailed above, it is to be understood that these examples are intended in an illustrative rather than in a limiting sense. It is contemplated that modifications and combinations will readily occur to those skilled in the art, which modifications and combinations will be within the spirit of the invention and the scope of the following claims. 

What is claimed is:
 1. A data processing system, comprising: a processor; a machine readable data storage medium coupled to the processor, having stored thereon instructions executable by the processor defining steps for laying out a photolithographic mask that defines a pattern in a layer to be formed using the mask, wherein said pattern includes a plurality of features, the steps comprising: identifying cutting areas for phase shift regions based upon characteristics of said pattern; assigning phase values to phase shift windows in the phase shift regions; wherein said assigning comprises cutting the phase shift regions in selected ones of the cutting areas to define the phase shift windows; and storing a result of said laying out and said assigning in a computer readable medium.
 2. The data processing system of claim 1, wherein said identifying cutting areas includes: identifying features in the plurality of features characterized by non-critical process latitude to define a set of features; identifying fields between features in the plurality of features characterized by critical process latitude to define a set of critical fields; and defining cutting areas as areas within the phase shift regions which extend between two features in the set of features, or between a feature in a set of features and a field outside the phase shift regions, without intersecting a field in the set of critical fields.
 3. The data processing system of claim 1, wherein said assigning comprises applying a cost function to determine the selected ones of the cutting areas.
 4. The data processing system of claim 1, wherein said assigning includes ranking said cutting areas based upon characteristics of said pattern, and determining the selected ones of the cutting areas based upon said ranking.
 5. The data processing system of claim 1, including laying out said phase shift areas in an opaque background.
 6. The data processing system of claim 1, including laying out said phase shift areas in a clear background.
 7. The data processing system of claim 1, wherein a characteristic of said pattern used in said identifying cutting areas, is that said pattern includes elbow shaped features.
 8. The data processing system of claim 1, wherein a characteristic of said pattern used in said identifying cutting areas, is that said pattern includes T-shaped features.
 9. The data processing system of claim 1, wherein a characteristic of said pattern used in said identifying cutting areas, is that said pattern includes polygons larger than a particular size.
 10. The data processing system of claim 1, wherein said assigning phase shift values includes defining a first set of phase shift window inducing θ degrees phase shifting and a second set of phase shift windows inducing φ degrees phase shifting.
 11. The data processing system of claim 10, wherein φ is equal to approximately θ+180 degrees.
 12. An article of manufacture, comprising: a machine readable data storage medium, having stored thereon instructions executable by a data processing system defining steps for laying out a photolithographic mask that defines a pattern in a layer to be formed using the mask, wherein said pattern includes a plurality of features, the steps comprising: identifying cutting areas for phase shift regions based upon characteristics of said pattern; assigning phase values to phase shift windows in the phase shift regions; wherein said assigning comprises cutting the phase shift regions in selected ones of the cutting areas to define the phase shift windows; and storing a result of said laying out and said assigning in a computer readable medium.
 13. The article of claim 12, wherein said identifying cutting areas includes: identifying features in the plurality of features characterized by non-critical process latitude to define a set of features; identifying fields between features in the plurality of features characterized by critical process latitude to define a set of critical fields; and defining cutting areas as areas within the phase shift regions which extend between two features in the set of features, or between a feature in a set of features and a field outside the phase shift regions, without intersecting a field in the set of critical fields.
 14. The article of claim 12, wherein said assigning comprises applying a cost function to determine the selected ones of the cutting areas.
 15. The article of claim 12, wherein said assigning includes ranking said cutting areas based upon characteristics of said pattern, and determining the selected ones of the cutting areas based upon said ranking.
 16. The article of claim 12, including laying out said phase shift areas in an opaque background.
 17. The article of claim 12, including laying out said phase shift areas in a clear background.
 18. The article of claim 12, wherein a characteristic of said pattern used in said identifying cutting areas, is that said pattern includes elbow shaped features.
 19. The article of claim 12, wherein a characteristic of said pattern used in said identifying cutting areas, is that said pattern includes T-shaped features.
 20. The article of claim 12, wherein a characteristic of said pattern used in said identifying cutting areas, is that said pattern includes polygons larger than a particular size.
 21. The article of claim 12, wherein said assigning phase shift values includes defining a first set of phase shift window inducing θ degrees phase shifting and a second set of phase shift windows inducing φ degrees phase shifting.
 22. The article of claim 21, wherein φ is equal to approximately θ+180 degrees.
 23. A method for manufacturing a layer of material in an integrated circuit, the layer of material having a pattern, wherein said pattern includes a plurality of features, comprising: using a photolithographic mask to define the layer of material, wherein the mask comprises a substrate; and a mask layer of material on said substrate, wherein the mask layer includes phase shift regions and fields, and a plurality of phase shift windows in the phase shift regions, the plurality of phase shift windows characterized by phase shift values that create phase transitions between the phase shift windows to form said pattern, wherein the boundaries of the phase shift windows lie within cutting areas that are defined based upon characteristics of said pattern.
 24. The method of claim 23, wherein a set of features in the plurality of features are characterized by non-critical process latitude, and a set of critical fields between features in the plurality of features are characterized by critical process latitude; and said cutting areas include areas within the phase shift regions which extend between two features in the set of features, or between a feature in the set of features and a field outside the phase shift regions, without intersecting a field in the set of critical fields.
 25. The method of claim 24, wherein the mask layer comprises an opaque material.
 26. The method of claim 25, wherein the mask layer comprises a clear material.
 27. The method of claim 26, wherein a characteristic of said pattern used in defining cutting areas, is that said pattern includes elbow shaped features.
 28. The method of claim 23, wherein a characteristic of said pattern used in defining cutting areas, is that said pattern includes T-shaped features.
 29. The method of claim 23, wherein a characteristic of said pattern used in defining cutting areas, is that said pattern includes polygons larger than a particular size.
 30. The method of claim 23, wherein said phase shift values include θ degrees phase shifting and φ degrees phase shifting, wherein φ is equal to approximately θ+180 degrees.
 31. The method of claim 23, including after using said photolithographic mark, using a second photolithographic mask.
 32. An integrated circuit manufactured according to a process comprising: using a photolithographic mask to define the layer of material on the integrated circuit, wherein the mask comprises a substrate; and a mask layer of material on said substrate, wherein the mask layer includes phase shift regions and fields, and a plurality of phase shift windows in the phase shift regions, the plurality of phase shift windows characterized by phase shift values that create phase transitions between the phase shift windows to form said pattern, wherein the boundaries of the phase shift windows lie within cutting areas that are defined prior to assigning of phase shift values, according to characteristics of said pattern.
 33. The integrated circuit of claim 32, wherein a set of features in the plurality of features are characterized by non-critical process latitude, and a set of critical fields between features in the plurality of features are characterized by critical process latitude; and said cutting areas include areas within the phase shift regions which extend between two features in the set of features, or between a feature in the set of features and a field outside the phase shift regions, without intersecting a field in the set of critical fields.
 34. The integrated circuit of claim 32, wherein the mask layer comprises an opaque material.
 35. The integrated circuit of claim 32, wherein the mask layer comprises a clear material.
 36. The integrated circuit of claim 32, wherein a characteristic of said pattern used in defining cutting areas, is that said pattern includes elbow shaped features.
 37. The integrated circuit of claim 32, wherein a characteristic of said pattern used in defining cutting areas, is that said pattern includes T-shaped features.
 38. The integrated circuit of claim 32, wherein a characteristic of said pattern used in defining cutting areas, is that said pattern includes polygons larger than a particular size.
 39. The integrated circuit of claim 32, wherein said phase shift values include θ degrees phase shifting and φ degrees phase shifting, wherein φ is equal to approximately θ+180 degrees.
 40. The integrated circuit of claim 32, including after using said photolithographic mark, using a second photolithographic mask.
 41. An integrated circuit having a patterned layer of material characterized by a dense set of small dimension features, the small dimension features defined using alternate phase shift masking, and placed in close proximity to other small dimension features.
 42. An electromagnetic waveform embodied on a carrier wave, the electromagnetic waveform comprising a computer program for assigning phase to a plurality of phase shifting regions in a phase shifting representation of a layer of an integrated circuit, the computer program further comprising: a first set of instructions for identifying a plurality of cutting areas in the phase shifting representation, the plurality of cutting areas specifying locations where a phase shift region in the plurality of phase shift regions can be divided into multiple phase shift windows; a second set of instructions for ranking the plurality of cutting areas; a third set of instructions for identifying, and assigning phase to, each of the plurality of phase shift windows in the phase shift representation by selectively using cutting areas in the plurality of cutting areas and the ranking of the plurality of cutting areas to resolve phase conflicts.
 43. The electromagnetic waveform of claim 42, wherein the layer of the integrated circuit includes a plurality of structures and wherein the phase shift representation is used for defining a substantially all of the plurality of structures using the plurality of phase shifting regions.
 44. The electromagnetic waveform of claim 42, wherein the computer program further comprises a fourth set of instructions for generating a second representation of the layer of the integrated circuit, the second representation designed for use in conjunction with the phase shifting representation to protect structures defined by the phase shifting representation and define additional structures in the layer.
 45. The electromagnetic waveform of claim 42, wherein the third set of instructions further comprises a set of instructions for assigning phase while minimizing number of cuts from the plurality of cutting areas during the selectively using.
 46. The electromagnetic waveform of claim 42, wherein the second set of instructions further comprises: a fourth set of instructions for analyzing a first representation of the layer of the integrated circuit to identify a plurality of features of high process latitude in the layer; a fifth set of instructions for analyzing the first representation of the layer of the integrated circuit to identifying a plurality of areas of field between features characterized by critical process latitude in the layer; and a sixth set of instructions for defining the plurality of cutting areas at locations within phase shift regions extending between at least one of: two features in the plurality of areas of high process latitude and a feature in the plurality of features of high process latitude and field outside the plurality of phase shift regions without intersecting the plurality of areas of field between features characterized by critical process latitude.
 47. The electromagnetic waveform of claim 42, wherein the computer program is designed for execution in parallel on one or more processors and the electromagnetic waveform comprises the computer program accessed over a network. 